posted 09-28-2000 10:49 AM ððð ðððð ðð ðð

How do they make the chips on those sheets anyway? I know they grow them or something, but I no idea other than the very, very basics, which are probably wrong anyway.

Anyone out there able to fill me in on this? Someone's gotta know. Thanks.

-Alcimedes

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posted 09-28-2000 12:45 PM ððð ðððð ðð ðð

quote:

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How to paint your room:

• Put an open can of paint in a paint-shaker.
  
• Turn on the paint shaker. Run out of the room (quickly!). Your room is now completely covered in paint.
  
• Put masking tape over everything that you actually wanted painted.
  
• Put an open can of paint remover in the paint-shaker. Turn it on and run out of the room.
  
• Clean away the sludge and remove the tape. Your room is now painted.
  

---

This is a fairly accurate description of how circuits are built on silicon. Eskimo is better suited than I am to describe this, but here goes. (Eskimo... let me know where I screwed up: much of this info is based on rather poor memory of 7 year-old tech)

First, deposit an insulator over your wafer. Then deposit polysilicon (the gates of all of your transistors). Then use a mask to photographically apply a photoresist layer over your poly where you want it to actually remain. Then etch away the poly that you don't want. Then apply a photoresist to etch away the insulator (but leave the poly) that you don't want (these will be the sources and drains of the transistors). Now you are left with polysilicon traces (Transistor gates, the width of which is that 1.8um or whatever value listed for the process) and insulator with holes revealing bare silicon. Now diffuse N+ into the bare silicon if it is a P substrate or P+ if you are using an N substrate to make the sources and drains. You have just made a transistor.

Now lay down more insulator and repeat the process to put down as many metal layers (aluminum or Copper) as your process allows. "holes" called vias are etched in the insulator layers to connect one metal layer to another, or a metal layer to the polysilicon or diffusions.

Note that most processes have several layers of polysilicon, areas of both P and N substrate so you can make both N and P channel FETs (hence CMOS: Complementary Metal Oxide Semiconductor) and many metal layers (like six, or so)

Close, Eskimo?

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-gEEk

There's such a fine line between stupid and clever. --David St. Hubbins, Spinal Tap

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posted 09-28-2000 12:58 PM ððð ðððð ðð ðð

By the way... this is a pretty general question, so I'm moving this to General Discussion. You were right!

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-gEEk

There's such a fine line between stupid and clever. --David St. Hubbins, Spinal Tap

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posted 09-28-2000 02:07 PM ððð ðððð ðð ðð

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Pretty good for an EE gEEk . I'll post on this when I get home from work. I'll even throw in some pretty pics maybe.

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posted 09-28-2000 07:21 PM ððð ðððð ðð ðð

This is a long description but I hope pretty easy to follow. IÌll break it up into chapters to make it easiers. 1 chapter per post.

Chapter1: Vacuum cleaners, telephones, and semiconductors?!
In the beginning there were vacuum tubes. The discovery of vacuum tube technology by Lee Deforest in 1906 was the jump start of electronic signal processing. These tubes were able to both switch on and off as well as to amplify an electrical signal. They made it possible to build ENIAC the worldÌs first electronic computer. This computer weighed 30 tons and took up 1500 square feet of area. It used nearly 20,000 vacuum tubes. However powerful it was for the time however, it suffered from the drawbacks inherent to vacuum tube technology. ItÌs uptime was very short due to the fact that one or more of the tubes was constantly burning out. Vacuum tubes are hot, prone to leak, require a lot of power, and donÌt last very long.

These problems led three people from Bell Laboratories (Formerly of AT&T, now Lucent Technology) to search for a better replacement for a vacuum tube. Two days before Christmas in 1947 John Bardeen, Walter Brattin, and William Shockley demonstrated the ability to electrically amplify a signal formed from Germanium. They called this invention a ÏtransistorÓ. It was smaller, took much less power, and had a very long lifetime. In 1959 Jack Kilby of Texas Instruments took the next step in the advancement of the industry by forming the first Ïintegrated circuitÓ or IC. It was a complete circuit consisting of several transistors, capacitors, and resistors in one solid piece of Germanium. This was a VERY important step forward. Suddenly a company could combine numerous electrical components on one small ÏchipÓ. Robert Noyce and Jean Horni of then Fairchild Camera (now Fairchild semiconductors) were able to take KilbyÌs circuit with its connecting wires and make patterns, trenches if you will, in the natural oxide that grew on silicon (see Ch. 2). Into these trenches they evaporated Aluminum which conducts electricity. This circuit is THE model for ALL integrated circuits up until today. Cost effective and able to be miniaturized an industry was born. The race was on J Who could provide the most functionality on one small piece of semiconductor?

What became of these pioneers? Well Robert Noyce left Fairchild to found a small start up with Andrew Grove and Gordon Moore which they dubbed Intel

William Shockley left Bell Labs and formed Shockley Laboratories in Palo Alto, CA, it provided the beginning of what is known today as Silicon Valley.

Two of Robert NoyceÌs co-workers at Fairchild were Charles Sporck and Jerry Sanders. Sporck left to found National Semiconductor (they made Cyrix processors), and Jerry Sanders left to found Advanced Micro Devices.

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posted 09-28-2000 07:35 PM ððð ðððð ðð ðð

quote:

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Originally posted by Eskimo:
They made it possible to build ENIAC the worldÌs first electronic computer. This computer weighed 30 tons and took up 1500 square feet of area. It used nearly 20,000 vacuum tubes.

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This is good stuff!

Just a quick trivial aside: The accumulators in ENIAC were actually tall vertical panels with a single column of lights (16), each indicating a single bit. When several of these accumulators were lined up in a row, you ended up with a large matrix of flashing lights, indicating the values stored in the accumulators.

That image of a wall of flashing lights became the standard way of indicating "computer" in movies and TV for years to come.

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-gEEk

There's such a fine line between stupid and clever. --David St. Hubbins, Spinal Tap

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posted 09-28-2000 07:59 PM ððð ðððð ðð ðð

The basic ingredient in almost every chip or processor made is Silicon. Atomic number 14 on the periodic table of elements. Silicon is sand basically. If youÌve ever taken a walk on a sandy beach you are walking on the basis of semiconductors. What is a semiconductor you say? Everyone throws that around so lets try to explain it a little.

One important property of a material is its ability, or inability, to conduct electricity. IÌm assuming youÌve heard of things like atoms, and electrons? Well electrons orbit around the center (nucleus) of an atom. In some elements such as metals like Aluminum, copper, and gold atomic forces do not hold the electrons in the outermost orbits of the atom tightly. So it is relatively easy to move these electrons away from that atom and thus form electric current. A materials ability to conduct electricity is known as conductivity. So metals are usually conductors because they have a high conductivity.

Opposite of metals are materials such as glass which is an insulator. Insulators have a very low conductivity. Do you know what glass is? Well your plain run of the mill glass is basically referred to chemically as SiO2, Silicon dioxide. Do you see Silicon in there? I do. Hmm, so SiO2 is a good insulator. WeÌll keep that in mind.

Ah now onto the meat, semiconductors. There are certain materials which appear in column IV of the periodic table of elements which are known as Intrinsic semiconductors. These are Silicon and Germanium. (There are other III-V and II-VI semiconductors but IÌm not going into them) These two elements have 4 electrons in their outermost shell (orbit). Now IÌm not going to explain why exactly this is so special, just take my word that this makes these elements suited to fit our needs for integrated circuits. By themselves Silicon isnÌt that great in IC applications. But, silicon is very easy to ÏdopeÓ. Doping is simply introducing atoms of other elements with more or less than 4 electrons amongst all the silicon atoms. This unbalances the siliconÌs 4 electrons and causes it to be slightly conductive. The more foreign substances you dope into the silicon (commonly Boron, Phosphorus, and Arsenic) the more conductive silicon can get. Cool so if we control how much ÏstuffÓ we put into the silicon we can control how conductive it is! This is very nice indeed.

BUT, yes there is a but, darn it all . See electrical current is carried by the movement of electrons (there are opposite conductors known as holes but that is just more confusion ). But if we ÏstuffÓ too many foreign atoms into the silicon it gets pretty crowded. So all of a sudden its not too easy for the electrons to move around and the conductivity actually decreases because the electrons are stuck in traffic! So the engineers and scientists have to consider all of this to reach a balance. WeÌll go into how they get those foreign atoms into the silicon a bit later.

Well now that you are an expert IÌll try to explain how we turn that sand into Ïcookie sheets as you so eloquently stated. Basically silicon (sand) is taken from the earth raw. Reacting it with chlorides and evaporating to form tetrachloride or trichlorosilane gas purifies it. This removes metals in the ore that might have been present. We want this stuff pure! The gas is reacted with hydrogen and reconstituted into electrical grade silicon. This silicon is ultra pure, like 99.999999999999%. See pic below:

It is in a crystal structure (super important). See crystals by nature are like rows and rows of legos that are all identical to each other in shape and size. And they all line up with each other in very tight rows. Now since making processors is a very very precise process we want our starting material to be exactly the same. We want every chip to be the same as every other chip so we want uniformity. Crystals work great for this. Plus the crystals have big spaces inside of them to hold our dopant material.

So they dump all that purified silicon in a big melting pot and heat it up to really high temperatures. (Melting temperature is around 1400 degrees Celsius). Into the vat of melted silicon a small crystal of silicon that is already arranged with a crystal orientation we want(called a seed) is attached to a metal rod and slightly dipped into the vat. This seed crystal is our ÏidealÓ lego block. Now silicon is very good about copying another solid crystal when it is in its liquid state. So the silicon swirls around and the atoms arrange themselves to match the seed crystal. The seed is very slowly rotated and removed ("pulled") from the vat, as it leaves the silicon attaches and cools to form solid. Because it is being rotated it forms in a cylinder.

So after a long pull you have this HUGE cylinder (standard is 200mm in diameter and weighing 450lbs.) of silicon that is crystallized and uniform. This method of ÏgrowingÓ silicon crystals is knows as the CZ method. Next a super precise diamond saw slices this huge cylinder into very thin slices (think of a deli slicer cutting salami). These slices we call wafers!

edited for some spelling

[This message has been edited by Eskimo (edited January 07, 2001).]

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posted 09-28-2000 08:22 PM ððð ðððð ðð ðð

So weÌve got these wafers now. They are real pretty too, very shiny like a mirror because while you werenÌt looking we went and polished them using a very advanced process called CMP. There were basically put on a pad (like one of those auto buffers) and spun around in a slurry (mixture) of some very special stuff. LetÌs leave it at that ok? While they are spinning (there are usually 5 at a time spinning on 5 pads on one machine) all 5 arms holding the pads are rotated in a big circle. ItÌs hard to describe but it reminds me of that ride at the fair that always makes me feel sick. Where you are sitting in a seat in a little capsule, and that capsule is spinning but its on a big arm that is rotating as well. Well all that stuff doesnÌt make the wafer puke, it makes it really really smooth. I just want to explain CMP because it is used a lot now of days on many steps as we go along.

Now there is a ton of stuff to be done to these wafers to get a G4 or Athlon out of them. When we make an Athlon there are literally over a thousand steps it goes through. The process of making a bunch of chips on a wafer is known as, well, a process J. See each wafer is pretty big, and chips are little tiny things (about the size of your thumbnail) so we might as well fit as many on as we can. This will save us money making a bunch at once! So throughout the process there are basically a few Ïspecial departmentsÓ known as modules that the wafers go back and forth between.

Oh let me stop and explain something else real quick. Since these tiny little things are so complicated and tiny one little spec of dust can wreck them. Dust may seem small to you and me but it is huge compared to the stuff we are working with. So we want to keep all that dust away from the wafer and the chips. This is why microchips are made in special factories that cost BILLIONS of dollars called Fabs. I guess Fab stands for Fabrication facility but everyone just calls it a Fab. To fab something is synonymous with make it too. So all these modules are inside of these expensive fabs. Now these fabs have millions and millions of dollars of equipment guaranteed to keep the wafers as clean as possible. Huge fans circulate the air inside through very expensive filters. In fact, now try to picture this, ALL the air in the whole fab facility is completely sucked out and replaced every 6 seconds!!! So it is very loud in the fab from all these fans J. The air generally flows out of the ceiling and out through grates in the floor. All the people inside the fab have to wear special ÏcleanÓ suits. The suits arenÌt there to protect the people from all the dangerous equipment and chemicals but instead protect the wafers from all the dirt and other nasty stuff we humans shed constantly. Fab25 (where I work) is considered a class 1 clean room. This means the largest particle you should find inside is less that .1 microns!!!! On top of that there you should only find 1 particle that big per cubic foot of air. For comparison I believe most hospital operating areas that are sterile are around Class 10,000 (10,000 particles instead of 1 per Cu. Ft.). A Micron is 1 millionth of an meter. 0.1 microns is the size of smoke particles!! Human hair is from 5-500 microns in diameter. We are talking very tiny. BTW, remember micron because we measure a lot of stuff in microns.

So you have all these modules with all their very special equipment in them. Each tool costs well over a million dollars to purchase. And each module has hundreds of these machines. Now you see why it costs Billions to build a modern Fab.

[This message has been edited by Eskimo (edited September 28, 2000).]

[This message has been edited by Eskimo (edited January 07, 2001).]

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posted 09-28-2000 09:31 PM ððð ðððð ðð ðð

So we are inside our nice clean building with lots of fancy equipment and these really cool looking wafers of silicon. What next? Well its time to make some chips (sigh of relief settles over poster who has been waiting for this part )

When you build a device on a wafer basically it is a lot like making a sandwich. You just keep adding layers and layers until you get the desired result. Of course itÌs more complicated then that. Remember I mentioned modules last chapter? Well there are 5 main modules in a fab. Photolithography, Etch, Polish, Diffusion, and Implant. A guy could write pages and pages about all the things each module does but IÌll try to keep it basic and brief.

Photolithography: When a bunch of Electrical engineers get together and decide to make a processor they figure out all the transistors and wires they will need to do all the cool stuff that a processor can do. Well these guys draw these designs just like an architect would draw blueprints. They basically make the blueprints for the chip, thus they are usually called computer architects. Now these blue prints for all these little transistors and wires have to make their way onto the wafer. The way this get done is known as photolithography. This process is actually very similar to how a camera works and how film is developed. Kodak is pretty big in the photolithography and it is a reason why a company called Fairchild Camera that I mentioned in Ch. 1 could be big in the industry.

The designs that are drawn up are taken and made into big quartz plates. On the quartz is a layer of chrome. The chrome is removed in the areas that represent all the trenches that the engineers want to appear on the chip. This quartz plate is known as a photomask or just mask. It is sort of like a negative is in photography. Well a wafer is taken and covered with a syrup like polymer material called photoresist. This is a very special liquid. Because ordinarily it is very hard to remove except with something like acetone. But due to complex chemistry when this resist is exposed to certain wavelengths of light it becomes soluble (you can dissolve it more easily). So the wafers are placed in a giant machine called a ÏstepperÓ.

The mask in inserted into the stepper as well and a light source is shined through the mask and onto the wafer. So remember when you were a kid and made shadow puppets? Well that is what happens to the wafer as the chrome on the mask blocks out the light and only allows it to shine through the clear spaces. So only the places under the clear area are ÏexposedÓ. The exposed areas will be able to be removed by dipping the wafer in some solution that is alkaline like sodium hydroxide or potassium hydroxide. This gets rid of that resist in those areas and is known as developing. Now there are all kinds of intermediate steps I am skipping to keep this simple as well as all sorts of problems that have to be overcome.

One basic one is that to make very tiny lines or features on our chip we need some special sort of light. In fact you probally canÌt even see this light. We are using deep ultra violet light (DUV). It has a wavelength of 248nm (for reference humans can generally see from around 300nm (violet) to 650nm (red). Now 248nm = .248 microns. LetÌs just round that off to .25 microns. This number might look familiar as many devices including Pentium II processors and Athlon processors were produced at this size. Now the light is limiting but using fancy optical tricks we can make things even smaller using that same wavelength of light, such as .18 micron like the new Motorola 7410 or the AMD Duron processor.

While we are at this point we should discuss why we call a stepper a stepper. Well the mask that is used is many many many times larger than the actual chip. The light is focused through the mask and uses lenses to shrink the image down. Think opposite of a magnifying glass. So it is actually putting this design on a very small part of the wafer. So after it exposes the place for that die (chip) it ÏstepsÓ over next to it and exposes another and another and keeps doing this until the whole wafer is filled up. This is very cost effective.

So what do we have now? We have a wafer covered in resist except in certain areas. What should we do with it? Well the wafer will go through photolithography MANY times throughout the process, so IÌm just going to pretend we are making a basic transistor. To do this IÌm going to send our wafer we exposed and developed and send it to the Implant module.

But basically this is the fundamental step of making processors, layers are added, and using lithography we can remove the parts we donÌt want there and leave other parts intact at very small sizes.

[This message has been edited by Eskimo (edited September 28, 2000).]

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posted 09-28-2000 10:17 PM ððð ðððð ðð ðð

Ah implant, where little boys who still havenÌt grown up all the way can live out their fantasies of shooting things while making a lot of money J. Remember back in Ch. 2 I mentioned that Silicon was neat because you could change its electrical characteristics by inserting foreign atoms? Well this is how we get them in. We use giant tools known as Ion implanters.

An Ion implanter literally blasts ions of a substance at the surface of a wafer and the ions become implanted, or lodged, in the crystalline structure of the Silicon. Using extremely high voltages and utilizing some neat laws of Electro-Magnetic laws we can accelerate an ion (basically an atom of a substance in a charged state) to a very high speed. Then using magnets we can control the path of the ion and send it hurtling at the wafer. Not to make this sound overly simple but basically after using complex equations and experimentation to determine how much ÏdoseÓ the wafer should receive an operator simply dials in the concentration of ions per cubic centimeter desired and presses the start button. The machine does all the rest. IÌm going to shoot a nice healthy dose of phosphorus into some clear areas IÌve made in our wafer.

Now you will see in the above picture there is some oxide on it. How did that get there? Well I should have explained this before Photo but didnÌt because I think photo is more important . As I mentioned awhile ago glass is Silicon dioxide. It forms naturally when pure silicon is exposed to oxygen. Like rust is to iron so to SiO2 is to silicon. But the oxide that grows on silicon naturally in the normal air is not good for us to use. We can do better J. So we take our wafer over to the Diffusion module where they play with fire. Basically a high quality layer of oxide can be grown on top of our silicon wafer by putting the wafers in a very hot (1000 degrees Celsius) furnace and pumping in some pure oxygen. After a few minutes we will remove the wafers and they will have a nice oxide on them.

[This message has been edited by Eskimo (edited September 28, 2000).]

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posted 09-28-2000 10:53 PM ððð ðððð ðð ðð

So if youÌve been following this far you understand that basically a wafer keeps passing back and forth between modules. If you canÌt tell IÌm getting a little tired from describing EVERY step so now IÌm just going to tell you what etch and polish do and then at the end IÌll show you a cross section of what a basic transistor looks like built on top of Chapter 5Ìs post implant cross section.

Etch is there to remove unwanted material. In the old days this was done by using chemicals such as Hydroflouric (HF) acid. But commonly now of days to achieve better results we use dry (plasma) etching.

Plasma is a chemical process that uses gases highly excited by high energy until it forms into a plasma state. This is the 4th state of matter; there is solid, liquid, gaseous, and then plasma. The power to excite the gas is provided by a RF (radio frequency) field. The energized plasma then attacks the surface of the wafer and literally chews it way through silicon. As it does this it gives off some very pretty colors and radiation that can be measured on spectroscopy tools. And stopped when the emitted light changes to indicate that it is done going through one material and has reached another. It is then stopped. A good etcher is one that is able to etch almost completely vertically without any horizontal damage as it tunnels down. Also it should be highly selective and only etch away the material desired to be removed.

After the transistor structures have been formed using oxide, doped regions of silicon, and a gate material metal such as aluminum or copper is used to connect the different sections of the transistor into a more complex transistor with the millions of other transistors in the chip. I will cover copper since you are probably more interested in that and it involves polish much more. Before the metal is added the wafer will look similar to this:

The entire surface is covered in oxide first. Then the pathways for the conduction lines are cleared using photolithography and etch steps. Once that has been done copper is laid down over the entire surface of the wafer. The remaining oxide keeps it from going where it isnÌt wanted. So it settles into the trenches. But now you have all this copper all over the place sort of splattered on the wafer, not very precise huh?

Well along comes our buddies in polish. Using the CMP process I outlined earlier they polish the entire wafer until it is smoothed down to the point where all the overlapping residual copper has been buffed away and only remains inside the channels. Then another layer of oxide is grown and another metal layer is repeated and so on. Modern processors use up to 6 layers of metal stacked on top of each other since it takes that many layers to route all the wires necessary to connect the millions and millions of transistors. Think of it as multiple overpasses over overpasses on the highway to route all the traffic smoothly. After all this you basically have a completed wafer like the one pictured below except this one is using Aluminum instead of copper metal.

Cross section when done, 1 transistor. Now imagine you were making millions of these at once.

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posted 09-28-2000 11:27 PM ððð ð ðð ðð

=-Insanely Great

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posted 09-28-2000 11:39 PM ððð ðððð ðð ðð

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This is great Eskimo! I'm looking forward to future chapters.

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posted 09-29-2000 01:35 AM ððð ðððð ðð ðð

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Join Team GameDev.net's SETI@Home Team!

http://setiathome.ssl.berkeley.edu/stats/team/team_79972.html

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posted 09-29-2000 01:41 AM ððð ðððð ðð ðð

I sort of think that this should have been kept in Current Hardware, though.

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posted 09-29-2000 01:56 AM ððð ðððð ðð ðð

quote:

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Originally posted by King Chung Huang:
This is great Eskimo! I'm looking forward to future chapters.

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What would you like in future chapters?

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posted 09-29-2000 08:28 AM ððð ðððð ðð ðð

i do have one question though. when you take the seed crystal, and dip it into the vat of molten sillicon, is there any way to have it come out as a square rod rather than a round one? isn't there a fair amount of wasted space on every wafer, since you can't make a square transistor fit perfectly into a round base?

ok, my next question is, what happens so that some chips come out being able to run at 700 Mhz, while chips from the same exact bacth will only run at 500Mhz. is it a crappy seed crystal, poor etching, poor polishing? is there any way to look at the good chips and tell what is different with them in relation to the slower chips from the same batch?

-Alcimedes

p.s. this has to be up there as one of the best replies ever. you might want to think about just putting your replies somewhere on reserve around here in case other people wonder. this is great stuff.

i feel like i'm getting a mainline of knowledge here.

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posted 09-29-2000 01:48 PM ððð ðððð ðð ðð

WOW! Great post, 'mo!

You put my feeble excuse for a response to shame! (although I still like that paint-the-room analogy from my VLSI lab )

My gf back in grad school was a Materials EE and did Molecular Beam Epitaxy and Ion Implantation. Your discussion of II brought it all back . She made Christmas tree ornaments out of 4 inch wafers she had made!

Let's have the next chapter! I noticed no poly in those diagrams you posted... does AMD use metal for gates? How about a discussion of the layers and stackup of the process used for Athlons? (or is that Athalons? )

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-gEEk

There's such a fine line between stupid and clever. --David St. Hubbins, Spinal Tap

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posted 09-29-2000 03:56 PM ððð ðððð ðð ðð

Looks really interesting -- and thorough

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iCan, and iWill.

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posted 09-29-2000 04:06 PM ððð ðððð ðð ðð

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My university has a class 100 clean room for chip manufacturing(nothing big, just testing mostly). I went on a tour of our solid state lab the other weekend, and it's pretty cool to hear about how chips are made.

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posted 09-29-2000 07:51 PM ððð ðððð ðð ðð

gEEk: Thanks, yes those diagrams showed metal gate mosfet's since they are a bit more simple than poly to explain. No we do not use metal gates almost everyone uses some sort of poly. As much as I would love to talk about layers in an Athlon (and could I ever ) I'm under an NDA that strictly forbids such things. Your paintcan thing did give me a good chuckle though

I might work on the next chapter tonight sometime if I get up the ambition. I'm drained from work and at this moment don't want to think about it. Alchimedes asked a fairly good question about what dictates speeds. The next chapter will probally be on backend wafer processing and testing. This is about as close as I have any personal experience to speeds. If I have the time i'll also go back and add a bit to the last chapter as I feel I cut it too short.

Thanks for the positive replies

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When you pirate MP3's you are downloading Communism.

"LAN party and AMD huh? Aren't you just the ubergeek huh?"

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posted 09-30-2000 12:10 AM ððð ðððð ðð ðð

Good work, Eskimo! Ever consider writing "Microprocessor Fabrication Processes for Dummies?"

You certainly should publish this work on the web, at least, and more than just in the AI forums!

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"Extreme Mobile User No. 1"

Apple, please give us a 3 lb. subnotebook!

[This message has been edited by tonton (edited September 30, 2000).]

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posted 09-30-2000 01:16 AM ððð ðððð ðð ðð

Well when we last we left our intrepid wafer it was basically finished. Remember the breakdown I gave you was highly simplistic and modern processors undergo hundreds and hundreds of process steps. Wafer fabs operate 24 hours a day 7 days a week and it still takes on average about 60 days from when a wafer is first ÏstartedÓ until it arrives at the Ïback endÓ. The back end is simply where the completed wafers will be tested, go through a connection process, and sorted. IÌll explain what each of these is below.

A modern large-scale production fab facility will start on average about 5000 8Ó wafers per week. This means you will end up with 5000 finished wafers each week. Now some wafers will be lost in the process. Wafers are fragile if stressed in certain directions. Remember that Silicon is closely related to glass, so essentially you have 8Ó thin slices of glass. If you drop one it WILL shatter. Also from time to time the very expensive and complicated tools mentioned earlier will eventually have an error while processing a wafer. Many times nothing can be done to erase damage done and the entire wafer has to be Ïscrapped.Ó In general when a wafer is scrapped it is sold for a little bit of money to a company that recycles them by melting them down and making new wafers out of them. Just like tin cans. One term you will hear over and over and over again in the semiconductor industry is yield. This is the measurement by which everyone measures how successfully a fab is operating. What good is it if you can make a 2GHz processor if you can only make 2 for every 1000 you try to make? YouÌll never make any money like that. So every company wants their yields to be as high as possible. Yield can be measured in two ways. Outsiders and laymen often like to express yield as a percentage. Thus take the number of good chips, divide by the number of total chips and multiply by 100% and you have a yield. In the industry a more common practice is to describe yield in die per wafer. Die is just another term for a chip. Why do we do it this way? Well the answer is that even engineers like to make math easy on themselves. If you know the average die per wafer produced, and you know the number of wafers you finished with, all you have to do is multiply to get your total chips. So if we were averaging 200 dpw (die per wafer) and had 5000 wafers then we would have made 1 million chips that week. Now there are lots of different yields such as line, sort, functional, and diegen among others. IÌm not going to explain them all, they just describe the yield at different steps of making a chip.

It is a sad fact of reality that not all of the chips on a wafer will operate perfectly or even at all. There are many reasons why this is so. Perhaps one of those ultra precise machines was not performing perfectly. Perhaps a spec of dust managed to land on that chip. There are endless possibilities. In my example above this fictional company would be faced with quite a dilemma. They have 1 million processors that need to be tested to make sure they operate properly. Suffice to say that given the time needed to perform such tests that it would take a massive investment in personnel and machinery in order to do that. So what can a company do? Now we get to what I actually do at my job. You see when the chips are placed on the wafers there are tiny little lines in between them all. This gives us room to cut them apart when we are done. Well we love to be efficient with our use of space on the wafers. So inside of these lines we put all kinds of different electrical testing structures. They are put in the plans of the chip so that as the photo masks lay down patterns and the implanters implant while they are building they chip they are also forming our test structures in these Ïscribe linesÓ. What does this mean? Well this means that these test structures were constructed under nearly identical circumstances as all those hundreds of chips. So instead of testing each and every one of those chips lets see how the wafer is looking by taking a sample using these structures. There are structures representing everything found inside the wafer. There are transistors, capacitors, resistors, and some other special structures. If something happened that messed up this whole wafer so that very few or none of the chips on it will end up working we will be able to tell without having to test all the chips. We run a series of electrical tests on the structure and look at the results. At AMD we call this process ÏWafer Electrical TestÓ or W.E.T, at other companies it is simply ÏElectrical TestÓ or ÏParametric TestÓ. And it is the results of these tests that I personally analyze and investigate. Because every failure is a clue as to what can be improved or fixed inside of the fab for better future yields. So if a wafer fails at WET we would simply scrap it rather than waste time on it anymore.

Now that we have hopefully weeded out all the bad eggs in the bunch lets get this puppy ready to call itself a real processor. A processor is useless if you canÌt plug it into your motherboard. So something has to connect the miniscule little connection places on the actual chip to bigger things like wires or pins. Every company does this differently but most including Intel, AMD, and IBM (probably Motorola as well) use a technology called Ïflip-chipÓ or Ïbump.Ó Using some more fancy process tools like photolithography and etch tiny little bumps of metal are deposited on the surface in the specified locations of connection points. When you get done you have chips covered in these little bumps. The great thing about this is that when the bumps are on all you have to do is literally flip the processor over onto a waiting package with pin outs to the motherboard. (IÌm sorry if this is confusing, it is fairly hard to describe and I donÌt know as much about this area). Here is what a wafer looks like after it is bumped.

Now that our wafer has been bumped it is time to see how well this thing works. This is done at Sort. Each wafer is taken one by one into a large machine that applies probes to all those little bumps. Well over a thousand tests are performed testing all sorts of variables. We want to see how much power the chip is going to take, how fast it will operate, and that this processor is reliable. AMD tests to ensure that every processor will perform at peak efficiency for a minimum of 10 years. Most other companies have similar criteria. Now these tests are quite basic. We arenÌt running Photoshop here. It is digital with 1Ìs and 0Ìs being put in and waiting for the right 1Ìs and 0Ìs to come back. More detailed testing will occur after the chip is packaged and it is taken, binned, and burned in. But this is far from the fab. Not all of these chips are going to work. Some will not function at all, some will require too much voltage for our needs, and some will not operate fast enough to sell. I wish I could tell you all the reasons things can go wrong but I canÌt. Usually the reason falls into one of two categories. It is either defect driven or process related. Defects involve all those little particles that can mess up our chips or a slight scratch from some exposed metal. Process related means that somewhere in the process something went wrong that was slight enough that it was able to pass W.E.T. but important enough to make our processor not run correctly or at all. Now in the old days if a tester discovered a die wasnÌt functioning it would spit a big spot of ink on it to signify such. Now of days we do it electronically and just store the location of that die in memory.

Sort is traditionally the last step for a wafer to go through in a fab. From here the wafer can be taken to a diamond bladed saw that separates all the processors on the wafer apart from each other. The bad dies are thrown out and the good ones are packaged and shipped to a packaging plant. AMD operates several such facilities in locations such as PeopleÌs Republic of China, Malaysia, and Thailand. After that it is sent off to a packaging facility where it is hermetically sealed (means it is protected from outside) inside of a plastic package. When you open up your computer and look at the chips on your motherboard or your main processor you will see that it is black.

Well when I showed you a completed wafer it was silver, what happened? Well that is the black plastic packaging material that you see. Inside of that plastic are metal pins that will connect to the bumps on the chips.

Sigh, I still havenÌt explained about speeds and such and IÌm tired of typing again. Well maybe another time. Oh IÌd also like to say that of all the subjects I studied in school English was by far my weakest. So go easy if you see grammatical mistakes and such. I used a spell checker so that should be ok, but I canÌt say the same thing about my use of the English language.

Eskimo

[This message has been edited by Eskimo (edited September 30, 2000).]

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posted 09-30-2000 02:33 AM ððð ð ðð ðð

It's very generous of you to educate us as you have with your many words in this thread.

Thank you.

If you win a pile of dough, you might direct an instructional video depicting how the typical personal computer actually works. For instance, I'd like to see an instruction, or set of instructions, travel through the CPU and see what happens to those instructions at each point along the way. I'd like to know what the processor sees as we type on our keyboards, as we send email, as we manipulate images in Photoshop, etc.

Thanks again for sharing your knowledge.

Sincerely,
Jaddie
Cocky MDJ Reader

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posted 09-30-2000 11:57 AM ððð ðððð ðð ðð

You reall should write "Microprocessor Fabrication Processes for Dummies" just like Tonton mentioned.

Great Job!

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posted 09-30-2000 12:40 PM ððð ðððð ðð ðð

Louisiana State University. We have two different types of machines for depositing metal. And I know definetly one, but I'm pretty sure about two machines for etching excess metal away. The professor said we also had the equipment for using copper on chips(process IBM developed).

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posted 09-30-2000 01:42 PM ððð ðððð ðð ðð

Nice job Eskimo!

Have you been to see the original transistor, developed by Bardeen et al, on display at Bell near RIT?

I haven't but I saw a documentary about it. Bardeen used a paper clip pressing down on the top to apply just the right amount of pressure to control a signal. Pretty cool. Evidently it still has the same bent out of shape paperclip pressing down on it to this day.

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posted 09-30-2000 02:24 PM ððð ðððð ðð ðð

quote:

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Originally posted by JGuidroz:
Eskimo,

Louisiana State University. We have two different types of machines for depositing metal. And I know definetly one, but I'm pretty sure about two machines for etching excess metal away. The professor said we also had the equipment for using copper on chips(process IBM developed).

---

Yes generally metals are deposited by means of sputtering or evaporation. So the two types of tools you have probally fit along those lines. CVD (chemical vapor depostition) is the method of applying most other layers such as polysilicon and nitride onto a wafer. If you can do copper at your school that is very impressive indeed! I didn't disucss it but wafers can be etched not only by using a plasma but also by using liquid etchants. It just isn't as popular now of days due to the fact it is hard to etch in just one direction.

seb, no I have't seen that. In fact I didn't even know it was up there! Where exactly is that? Is that in Rochester or Syr. or what? I'll have to go see that when I go back in November.

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posted 01-07-2001 07:59 PM ððð ðððð ðð ðð

Beautiful!

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d

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posted 02-07-2001 01:17 AM ððð ð ðð ðð

Awesome post!

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~~Bodhi~~
~~Peace~~

Homer (reading Internet for Dummies): Wow... they've got the Internet on computers now?

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posted 02-07-2001 02:55 AM ððð ðððð ðð ðð

Man, Esk, that was amazing. Do yall do tours at the AMD fab down there in Texas? That rules so hardcore. Whew.
I want another chapter!

wyn

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"Your reality, sir, is lies and balderdash and I'm delighted to say that I have no grasp of it whatsoever."
Baron Munchausen from "The Adventures of Baron Munchausen"

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posted 02-07-2001 03:24 AM ððð ðððð ðð ðð

I just bookmarked this thread! We should nominate this thread "The thread of the year"

[This message has been edited by Leonis (edited 02-07-2001).]

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posted 02-07-2001 11:07 AM ððð ð ðð ðð

*sombre tone*
Eskimo, you are The Man

And pictures too !!!!!!
Oh and don't worry about your writing ability - it rawks!!. Seriously, that was so well written - so easy to understand, yet so informative. Good Sh!t !!

When I grow up, I wanna work in a Fab!

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posted 02-08-2001 07:36 AM ððð ðððð ðð ðð

---

Mmm...Cookies!!!...Yum.8)

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posted 02-13-2001 03:02 PM ððð ð ðð ðð

Speed! How is this done!?! Next chapter!!

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~~Bodhi~~
~~Peace~~

Homer (reading Internet for Dummies): Wow... they've got the Internet on computers now?

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posted 02-13-2001 05:46 PM ððð ðððð ðð ðð

Sorry Bodhi, I've been sort of busy. Let's see how I can explain some of this in a brief manner. Motoman or gEEk or one of the other EE's would be better at explaining speed due to logic delays and such. What I know about is the physical means by which a transistor operates.

Chapter 8:
You can think of a transistor as a switch, as this is what it is often used for in digital logic devices such as a processor. The most common type of transistor in use today is called a MOSFET. This stands for Metal Oxide Semiconductor Field Effect Transistor. Don't worry about the big sounding name. Basically the first 3 words describe the physical structure of the transistor. You have a layer of metal, under which lies a layer of oxide, under which lies your silicon substrate. The Field Effect transistor describes the way in which the transistor is "turned on". I'll try to explain this further down. You can refer to the figure below as I explain this. The silver is the Metal. The brown is the oxide, and the blue is the semiconductor.

When I was taught this I liked the water analogy so I'll try to explain this using that. There are two doped regions of the silicon (if you remember doping involved putting foreign atoms into the silicon crystal lattice). One region is called the 'source', the other is the 'drain'. As I skipped talking about holes earlier I will make this a NMOS transistor. So you have these big reservoirs (lakes)filled with a bunch of extra electrons. Electrical current is a measure of the movement of electrons in a given amount of time. Like measuring the water flow in a pipe, how much water passes a point in a given amount of time. Now the level of the water in each of these "lakes" is determined by the electric potential. Electric potential is another term for voltage if that helps. So if you have more potential on your source "lake" than on your drain "lake" it is like having two lakes being next to each other, but one at a higher elevation than the other. Like Lake Erie and Lake Ontario. Now what happens when there is a path for water (electrons) from one lake to flow to the other? Well you can get Niagara falls if you aren't careful .

The path for our electrons to travel along is called the channel. The distance that the channel extends from the drain to the source is called the channel length. This is the smallest geometric length that is built into a chip. Thus when a company is producing a chip at .18 micron it means that the distance between the source and drain is that long, basically.

Now the channel is not normally present in the silicon. This is a good thing or else we would have those crazy electrons taking off on their own accord. We like to be able to control things. So if there is no channel and there is no flow of electrons then we can say that the transistor is OFF, or you could say it represents a 0, or FALSE. Now maybe you are starting to see the basics of why a computer thinks in 1's and 0's.

So how do we get a 1? Well we need to form the channel. We have our gate in the center of our diagram. You can picture this as a valve on the dam separating our two "lakes". To open up this valve we only need to apply a small amount of voltage. When this voltage gets to a certain point (known as Vt, the threshold voltage) it opens up the channel. It does so because when you have a potential difference across a dielectric (a sort of insulator) an electric field is formed. As this electric field grows strong enough it is able to suck up some of the electrons stuck in the silicon substrate and bring them near the surface. The electrons don't have as much trouble traveling through other electrons as they do plain old silicon. So they are free to try to balance out the voltage differences between the source and drain by flowing causing current.

The design engineers design their circuits so that when a certain level of current flow is achieved they can consider that transistor to be ON, or a 1, or TRUE.

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posted 02-13-2001 05:47 PM ððð ðððð ðð ðð

Now how can we improve the speed at which this happens? Well for one, we can reduce the length of the channel so that our electrons don't have to travel as far. This is why when a semiconductor manufacturer 'shrinks' their process their chips can run faster. A .18 micron G4 can run faster than a .20 micron G4.

Another way we can do this is by changing the level of the electrons in the source and drain so that their is a greater tendency for them to flow. This is like raising the level of one of our lakes. This can be done by increasing the voltage difference between the two (a common tool of the overclocker ) or it can be done by introducing different levels of dopants into the source/drain region.

Another method to increase the speed is to reduce the voltage at which the transistor can turn. We can't increase the gate voltage totally instantaneously, it takes a little time to do so. If we lower the voltage we lower the time needed. To enable a lower threshold voltage we can make the oxide between the gate and the semiconductor smaller. This way it takes a smaller electric field. The problem with this is that our oxides are getting VERY VERY thin. Right now Intel, AMD, Motorola, and IBM are talking about putting down a layer of oxide only 3-4 ATOMS thick!!! This is incredibly hard to do. So what we are trying to do is find a good material that blocks the electric field slightly less than silicon dioxide. If we can settle on a good material to do this than we can make thicker gate oxides out of this material. These are referred to as "low k dielectrics". The only problem is that every company and their brother claim to have found the easiest and best low k material. Now we have to sift through all of them and figure out which will do a good job and be as easy to work with as silicon dioxide is.

Now if an electron is just minding it's own business traveling along in the channel and suddenly hits the bottom it may become snagged. This would lower your current and slow down your transistor. Some electrons do end up doing this and this is known as leakage current. To try to reduce leakage current one recent innovation is known as Silicon On Insulator, or SOI. By putting some oxide right beneath the silicon surface the electrons are less likely to stray from their path. With less leakage current you don't have to force as many electrons through and you don't lose as many. This makes chips run cooler AND faster. Not too shabby (Thanks IBM! ).

Now we haven't talked to much about it but there is a whole network of connections sort of like roads running over the transistors in order to connect them. If our signals can't pass effectively through these highways then it won't matter how fast our transistors can go. Some things done to improve this is the use of alternate metals (such as copper instead of aluminum). Another factor is that two conductors traveling near each other will form a capacitor of sorts between themselves. Capacitance will slow down our ability to pass electrical signals. We try to isolate them with silicon dioxide. But as we make these wires tinier and tinier they get closer and closer making it hard to reduce this capacitance. So research now is being done looking into high 'k' dielectric materials by which to separate the metals with.

Well I hope that answers some of your questions. The actual design of how these transistors are used also has a huge effect on determining how fast a chip can go. But when you hear of chips that aren't yielding or are only running at say 500MHz even though they are designed to go faster it could very well be because something mentioned above wasn't produced exactly right.

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posted 02-13-2001 05:52 PM ððð ðððð ðð ðð

On a side note, this thread didn't even get one mention for "AI Thread of the Year"

I thought it was a good thread

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posted 02-13-2001 07:09 PM ððð ðððð ðð ðð

is there some reason why the wafers always come out as a circle? in all the pictures, you can see chips that are cut by the curvature of the circle. is there some reason why the wafers always come off of a cylinder, instead of a square shape?

is it possible to have the seed crystal grow into a rectangular shape, instead of a cylindrical one?

-alcimedes

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posted 02-13-2001 07:17 PM ððð ðððð ðð ðð

We COULD saw the wafers to make them square while they are still in ingot form. But this actually leads to more trouble than it is worth because it allows the corners and edges to be more easily damaged or chipped during processing. And once a crack starts in a silicon wafer it travels through the whole length of the wafer due to it's crystalline structure, ruining the whole thing. Also all wafer handling machinery is built to handle circular wafers so there is little incentive to change the shape. While we could probably fit a few more die on the wafers as we reach larger and larger diameter wafers the percentage of "edge die" that aren't whole decreases quite a bit.

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